Quote: Originally Posted by
duster360 
Timing
It does look particularly low,,at least lower than most other logs. I thought it might be the high ECT and ACT but after checking several member's logs they're not that far out of line as I thought.
I'm thinking its just the slow rate of change in RPM that makes the timing look lower. Check the log I emailed you titled "TheGame_4th_1.log". Its a 4th gear log also with similiar ECT/ACT and timing. His timing is a 2-3 degrees higher after 4500rpm but he has no ST/LT Knock
IC
To check your DFMIC efficiency you need to check the Pre IC temps. If boost leaks are causing ususally high outlet temp the ACT might not be too bad.
Knock
You have a bit of Long term Knock(1.5degrees) after 4K rpm
What is LT in relation to ST? I know ST is basically the 'current' knock...is LT the "learned" knock from patterns of ST knock? And if so, is the only way to remove it to reset the PCM or do several pulls with lower ST knock so it eventually relearns and updates the LT knock?
Also, how would I check my PRE IC temps? I'm guessing another sensor, heh?
